Tilera is shipping a 36-core version of its 64-core Tile64 SoC (system-on-chip). Aimed at graphics-intensive embedded applications and networking devices, the TilePro36 clocks from 600MHz to 900MHz, consumes 9-13 Watts (typical), and runs Linux on each, some, or all cores.
The Tile SoCs are based on a proprietary VLIW (very long instruction word) architecture, on which a MIPS-like RISC architecture is implemented in microcode. A hypervisor enables each core to run its own instance of Linux -- or other OSes, once they become available. Alternatively, the whole chip can run Tilera's SMP (symmetrical multiprocessing) Linux implementation.
Tilera first announced the TilePro36 in September, concurrently with a 64-way TilePro model. The chips are fabbed on 90nm process technology at TMSC.
http://www.linuxlinks.com/portal/news/article.php?story=20081216141018214